The present invention relates to a ferroelectric memory device.
As a ferroelectric memory device, an active ferroelectric memory device including 1T/1C cells in which one transistor and one ferroelectric capacitor are disposed in each memory cell, or including 2T/2C cells in which a reference cell is further disposed in each memory cell, has been known.
However, since the active ferroelectric memory device has a large memory area in comparison with a flash memory or EEPROM which is known as a nonvolatile memory device in which a memory cell is formed by one element, the capacity cannot be increased.
As a nonvolatile memory device which is more suitably increased in capacity, a ferroelectric memory device in which each memory cell is formed by one ferroelectric capacitor has been proposed (see Japanese Patent Application Laid-open No. 9-116107).
In the ferroelectric memory device in which each memory cell is formed by one ferroelectric capacitor, since each memory cell does not include a switching transistor, a voltage which is not expected in the design stage may be applied. In particular, disturbance occurs if an overvoltage is repeatedly applied to unselected memory cells. In the worst situation, data is reversed.